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Flashcards in 5 Sequential circuit descriptions Deck (26)
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1
Q

What are sequential circuits?

A

Sequential circuits act as storage elements and have memory. These circuits can store, retain and retrieve information when needed.

2
Q

Block diagram for a Asynchronous sequential circuit?

A
3
Q

Block diagram for a synchronous sequential counter?

A
4
Q

Latches?

A

Latches are useful for storing binary information and for the design of asynchronous sequential circuits. The output of a latch is affected as soon as the inputs change.

5
Q

Flip-Flops?

A

Flip-flops are part of synchronised sequential circuits. Flip-flops employ a common clock. The state of the flip-flop changes when the pulse, from the clock, goes from high to low or low to high.

6
Q

Syntax for a latch?

A
7
Q

How are latches used to store information?

A
8
Q

The uses of latches in asynchronous and synchronous circuits?

A

Latches are used in asynchronous circuits to store state.

Always avoid latches in synchronous circuits.

9
Q

Flip flop setup(posedge)?

A
10
Q

Flip Flop setup(negedge)?

A
11
Q

Blocking assignment?

A

Blocking assignment is performed using “=“. This assignment blocks the flow of the program during the execution of each statement. Blocking assignments are used for combinatorial logic.

12
Q

Nonblocking assignment?

A

Nonblocking assignment is performed using “<=“. This assignment does not block the flow of the program, all statements are evaluated, scheduled and executed at the end of the always block. Nonblocking assignments are used for flip-flops and registers

13
Q

Example Full adder with blocking assignment?

A
14
Q

Example Full adder with nonblocking assignment?

A
15
Q

Full adder with blocking, output?

A
16
Q

Full adder with nonblocking, output?

A
17
Q

How are registers created with more than one bit?

A
18
Q

What is the concatenation operator?

A

In SystemVerilog, shift registers require the concatenation operator { }, which combines groups of bits into a bus for their manipulation, e.g., shift, rotate, swap, repeat.

19
Q

Syntax required for

Rotate, SWap and repeat shifts

A

Rotate right: Reg <= { Reg[14:0], Reg[15] };

Swap bytes: Reg <= { Reg[7:0], Reg[15:8] };

Repeat: Reg <= { 2{ Reg[7:0] } };

20
Q

Example code for shifting in parrallel?

A
21
Q

Simulation clocks?

A
22
Q

What is a synchronous reset?

A

In synchronous resets, assignments to the outputs of the digital system will take place on the next rising edge of the clock.

23
Q

What is an asynchronous reset?

A

In asynchronous resets, assignments to the outputs of the digital system will take place immediately. The update process do not need to wait until the next rising edge of the clock

24
Q

Synchronous Reset implemented in logic?

A
25
Q

Asynchronous Reset implemented in logic?

A
26
Q
A